Complementary symmetry, buffer amplifier

Here is a really cool concept that I first saw on some commercial units and decided that I would
look into. It is called: Complementary Symmetry, Emitter Biased, Common Collector Amplifier.
Some name eh?

At first glance it looks a bit weird, but It is a very simple, and quite elegant, circuit. Here is the analysis:

Note 1. I have disconnected the output of Qf from the inputs of Q1 and Q2. I will connect them
later. Right now, the output of Qf is not loaded.
Note 1. Vs acts like a short circuit as far as bias conditions are concerned. This shorts out Rz.
Note 2. Resistors: Rbus and Re are actually parallel to each other so we can combine them
into 1 (1K) resistor but we won't. More on that later.

Now, let's run the DC Bias analysis and see the results.

Nothing fancy here, just read the values from the circuit above.

Now, going around the base of Qf

Just read from the schematic above

The result of the two parallel resistors

Which is really Vdd and things check out.

I sort of cheated here by reading the values of Ib, however, as you can see, the result would have been
the same If I solved for Ib and substituted the value of 12 for Vck which is really Vdd. The next
thing to realize here is that if I connect a high impedance load to point "Vfeed", the voltage there will
remain, relatively, the same.

The reason for this is that with common collector amplifiers, the input resistance is very high and
do not load the circuit.

This circuit is also very stable since it uses two power supplies. Since we know what the voltage
will be, we don't worry so much about biasing resistors.

Right now the Voltage at Vfeed is: 788.69mv. So let's connect another common
collector amplifier to Vfeed.

It looks like the voltage at Vfeed dropped from 788.69mv to 788.54mv.

So, the difference as you can see is about 2 hundredth of a percent. For all
practical purposes this is not a change at all.

If we take this to the next step and connect the second amplifier to Vfeed, the voltage drops to 788.38mv. Again this is not
a significant difference at all.

What I will show next is the Power dissipated by the circuit with two amplifiers connected to Vfeed.

I wanted to keep the collector and emitter currents around 10ma. to keep the noise down. This circuit configuration succeeds in doing just that.
Also, The transistors only use about 130mW which should keep them cool. They should be heat sinked anyway.
Here you can see why the resistors Re and Rbus are not connected together. This configuration allows uses a much lower power figure for each resistor.

Let's see what the input impedance looks like:

Again, here we see that the input impedance is basically 50 ohms. This should not come as a surprise since I have a 50 ohm resistor in parallel
with Vs.

What is I take out the 50 Ohm resistor (Rz) and let Vs "see" the amplifier?

Theory states that for this type of amplifier:

Now, from the graph we see that this value is very close. Remember that beta is a very unpredictable value in transistors.
We make a calculation based on a manufacturer's minimum beta and this is the best we can do.